Senior/Staff FPGA Design Engineer (Imaging & Video Systems)
--10xEngineers--
Experience Level: Senior (4 to 6+ years)
Location: Hybrid
Job Type: Full-Time
As a Senior / Staff FPGA Design Engineer, you will be a key contributor on client engagements, executing detailed FPGA RTL design, verification, timing closure, and integration. You will work closely with project leads, system architects, and cross-discipline teams to deliver quality FPGA deliverables that meet client technical targets and timelines.
Core Responsibilities
Deliver hands-on RTL architecture, implementation, and verification using SystemVerilog/VHDL for client FPGA solutions.
Develop and optimize microarchitectures for imaging/video processing and high-speed data paths.
Build robust test benches and verification environments; validate designs through simulation and hardware trials.
Execute timing analysis and closure, ensuring designs meet performance and frequency goals.
Integrate and debug FPGA designs with lab hardware, collaborating with software, hardware, and system teams.
Support interface standards and protocol implementations (e.g., PCIe, DDR, high-speed serial links).
Provide technical documentation, design reviews, and client reporting.
Mentor and provide design leadership to less experienced engineers on multi-project teams.
Qualifications
Senior Level: 4–6+ years FPGA design experience; Staff Level: 6-8+ years with proven delivery of complex FPGA subsystems and high-impact projects.
Expert in static timing analysis (STA), constraints, and timing closure for high-performance digital designs.
Hands-on with high-speed interfaces/protocols such as PCIe, DDR4/5/LPDDR, MIPI/CSI-2, HDMI/DisplayPort, SDI, and Ethernet, including SERDES configuration and optimization.
Proficient in FPGA development flows, HDL (SystemVerilog/VHDL), synthesis, place-and-route, and timing/power analysis using tools such as Vivado and Quartus.
Track record of debugging and validating FPGA hardware using lab tools (oscilloscopes, logic analyzers, embedded logic analyzers) through board and system bring-up.
Demonstrated experience integrating FPGA logic with cross-discipline teams (hardware, firmware, software) to deliver complete, client-ready solutions.
Skilled in scripting for automation and build flows (Python, Tcl, Perl, or similar), with the ability to streamline verification and regression testing.
Location & Work Authorization
- This role may be based in Lahore, Pakistan or Barcelona, Spain.
- Barcelona-based engineers are expected to spend approximately 3-4 months per year in Lahore collaborating with the engineering team.
- Lahore-based engineers will primarily work from Lahore, with potential relocation opportunities to Barcelona based on business needs.
- Candidates must already have valid work authorization in their country of residence.