FPGA Architect (Imaging & Video Systems)
--10xEngineers--
Location: Hybrid
Experience Level: Architect (10+ years)
About the role
As an FPGA Architect, you will define and drive the end-to-end FPGA architecture for high-throughput imaging/video systems for multiple clients. You will be responsible for shaping architecture across engagements, balancing performance, latency, integration complexity, and resource budgets. You'll lead technical solutions that solve diverse client challenges from real-time pipelines to memory subsystems and high-speed interfaces, and guide project teams to execute them.
What you'll be doing
Define end-to-end data flow and hardware partitioning for multi-stream imaging/video pipelines tailored to client needs.
Establish and manage budgets for logic utilization (LUTs/FFs), DSP slices, Block RAM/URAM, and memory bandwidth across FPGA fabric.
Architect deterministic low-latency designs and orchestrate high-throughput memory controllers, frame buffering mechanisms, and DMA for asynchronous client systems.
Lead integration of high-speed interfaces, including MIPI CSI/DSI, HDMI, DisplayPort, SDI, PCIe, and transceiver configuration (GTY/GTH).
Drive architectural trade studies ("make vs buy") for specialized IP such as video codecs, color-space converters, and scaling engines.
Author parameterizable RTL using SystemVerilog or VHDL for client-specific processing blocks with a strong focus on scalability, reusability, and performance.
Define and implement robust CDC strategies, timing closure methodologies, and verification plans (UVM/SystemVerilog).
Standardize and enhance FPGA workflows within vendor tools (Vivado/Quartus) to support consistent client delivery.
Mentor design teams and elevate architectural thinking across multiple projects.
Evaluate FPGA platforms and recommend appropriate technologies based on client requirements.
What we're looking for
10+ years in FPGA/ASIC digital design, including significant experience in high-throughput imaging or video processing applications.
Advanced proficiency in SystemVerilog and VHDL for RTL architecture and implementation.
Strong understanding of DSP building blocks, fixed-point arithmetic, and performance/area trade-offs.
Demonstrated expertise with high-speed interfaces (MIPI, HDMI, SDI, PCIe) and memory subsystems such as DDR and HBM.
Experience with ARM-based SoC interconnects (AXI, etc.) and embedded processing integration.
Expert knowledge of FPGA architecture fundamentals, STA/timing closure, clocking strategies, and synthesis constraints.
Proficiency in scripting (Python, Tcl, Perl) for build automation and modeling.
Bonus points
Experience with FPGA SoC platforms (e.g., Zynq UltraScale+, Versal, Altera Stratix, Agilex).
Familiarity with embedded Linux and device integration for custom IPs.
Exposure to HLS tools for algorithm acceleration and client solution development.