Senior CPU Design Verification Engineer
--10xEngineers--
Industry: Semiconductor / Design Verification / RISC-V
Job Summary
At 10xEngineers, we work with global semiconductor companies to design and verify processors and SoC IP, including RISC-V-based systems.
We’re looking for Senior CPU Design Verification Engineers to work across the verification lifecycle, from developing verification plans and environments to debugging complex architectural and RTL issues.
You don't need to tick every box below to apply. We’re interested in engineers from adjacent technical backgrounds who have strong fundamentals, relevant hands-on experience, and the motivation to grow deeper into CPU verification.
What you'll do
Own verification of a CPU unit or subsystem end to end — write the verification plan, define signoff criteria, and drive it to closure with the design team.
Build and maintain SystemVerilog/UVM verification environments: agents, scoreboards, checkers, and reusable components across projects.
Develop constrained-random and directed stimulus, including C and Assembly test programs that exercise architectural behaviour.
Set up and debug ISS co-simulation flows — trace and architectural-state comparison against a golden reference model such as Spike or Sail, over RVFI/RVVI or an equivalent retirement interface.
Integrate and constrain random instruction stream generators (riscv-dv, Force-RISCV or similar) and the RISC-V Architecture Tests into the regression suite.
Write and debug SystemVerilog Assertions; build functional and code coverage models and close coverage holes.
Run and triage regressions: root-cause failures across the specification, RTL, testbench, and test program, and drive each to resolution.
Verify areas such as instruction fetch and decode, execution and pipeline control, branch prediction, load/store and caches, MMU and virtual memory, interrupts and exceptions, and CPU/SoC interfaces.
Verify multicore and memory-ordering behaviour where the project calls for it, coherency, RVWMO, litmus-style tests.
Improve verification infrastructure and automation: regression flows, CI, coverage reporting, debug tooling.
Give architects and designers early verification feedback, flag design risk and ambiguity in the spec before it reaches RTL.
Review verification plans and testbench code, and help newer engineers on the team ramp up.
What we're looking for
Minimum BS in Electrical Engineering, Computer Engineering, or a related discipline.
2+ years of relevant experience in design verification, digital design, embedded systems, CPU architecture, FPGA, system validation, or a closely related field.
Strong understanding of Computer Architecture and Digital Logic Design.
Good programming skills in C; Assembly experience is a plus.
Familiarity with at least one processor architecture, such as RISC-V, ARM, MIPS, or x86.
Strong debugging and analytical skills.
Ability to own verification of a core submodule end-to-end, define the verification strategy/ plan, drive signoff criteria; and mentor and influence microarchitecture through early verification feedback.
Motivation to work close to hardware and develop deeper expertise in CPU verification.
Bonus Points
Hands-on experience with SystemVerilog and UVM.
Experience with multicore processor systems, including memory consistency and cache coherency.
Experience developing testbenches, test plans, coverage, or assertions.
Experience with RISC-V Architecture Tests.
Knowledge of AXI, AHB, APB, or other SoC interfaces.
Formal verification experience.
Experience with Cocotb, DPI, or co-simulation.
Experience with QEMU, Verilator, or software/emulation-based verification.
Embedded software development or firmware-assisted hardware validation.
Experience with VCS, Verdi, Questa, Xcelium, Jasper, or similar tools.
Your path into Design Verification doesn't need to be linear
Our verification work requires strong fundamentals in computer architecture, digital logic, programming, and debugging, and those foundations can come from several different backgrounds.
Our team includes engineers who have come from areas such as embedded systems, processor architecture, digital design, and system-level validation.
You don't need every verification-specific skill before joining us. If you have strong fundamentals and relevant hands-on experience, we'd still like to hear from you.